In a p-i-n diode shown in FIGS. 1A and 1B (a related device A) that is widely used at present, a large transient current flows therein in the reverse direction when switched from a turned-on state to a turned-off state (at reverse recovery). The current is referred to as a reverse recovery current. During that time, a larger electrical loss occurs in the diode than in a steady state. Thus, it is a requisite for the diode to make the loss small to operate at a high-speed. Furthermore, during that time, electrical duty in the diode becomes higher, as compared with that in the steady state. An increased steady current flowing in the diode or an increased DC bus voltage increases the electrical duty to thereby sometimes damage the diode. For assuring high reliability in a diode used for electric power equipment, it is strongly required that reverse recovery withstanding capability be made far higher than the rating one.
As a current measure for improving reverse recovery characteristics and withstanding capability of the p-i-n diode, there is widely applied lifetime control of minority carriers that is performed by using heavy metal diffusion or electron beam irradiation. Namely, by shortening carrier lifetimes, a total carrier concentration in a steady state can be reduced to reduce the concentration of carriers swept-out by a spread space charge region during the reverse recovery. This can decrease a reverse recovery peak current and reverse recovery charges to reduce reverse recovery loss. Moreover, an electric field strength during the reverse recovery, which is due to holes running through the space charge region, is also relaxed by the reduction in the hole concentration. Thus, the duty is reduced to enhance the reverse recovery withstanding capability.
Also, it is important to make the diode perform soft recovery. In recent years, from the view point of environmental safety, the emphasis has been focused on reducing electromagnetic noise generated from power electronics equipment. One of the ways to achieve that goal is with making reverse recovery of the diode performed in a soft recovery mode to inhibit the cause of noise, such as from oscillation. The measure for the soft recovery is well carried out by lowering the efficiency of minority carrier injection from an anode side. Typical examples of this are presented as a Merged P-I-N/Schottky Diode (MPS) (as disclosed in The Pinch Rectifier by B. J. Baliga, IEEE Electron. Dev. Lett., ED-5, p. 194 (1984)) and a Soft and Fast recovery Diode (SFD) (as disclosed in A Novel Soft and Fast Recovery Diode (SFD) with Thin P-layer Formed by Al—Si Electrode by M. Mori, et al., Proceedings of ISPSD'91, pp. 113–117 (1991)).
The MPS diode is a p-i-n diode with an anode thereof arranged with a p-region and a Schottky region. This arrangement is explained in reference with FIG. 2 is a perspective view showing a principal part of an MPS diode. A surface structure (an anode layer 72a) is formed with p-regions 72b and a Schottky region 72c. In the figure, each of the p-regions 72a has a circular plane shape with the center thereof disposed at each of lattice points of a triangular lattice. Reference numerals 71a, 73a, 74a, 75a, and 76a in the figure denote an n-drift layer, an n-cathode layer, an anode electrode, a cathode electrode, and a voltage withstanding structure, respectively.
The high speed and low-loss characteristics in the reverse recovery operation and the soft recovery characteristics are in a relation that requires a trade-off (as disclosed in An Advanced FWD Design Concept with Superior Soft Reverse Recovery Characteristics by M. Nemoto, et al., Proceedings of ISPSD2000, pp. 119–122 (2000)). Namely, for performing the soft recovery, many minority carriers are made stored particularly on the cathode side. This is for reserving the largest possible number of minority carriers on the cathode side when the space charge region is spread from the anode side toward the cathode side at the reverse recovery. Thus, a decreasing rate of an anode current dir/dt is made lowered. This, however, causes an increase in the reverse recovery loss that requires some time until the reverse recovery is ended. On the contrary, performing high speed and low-loss reverse recovery is to reduce minority carriers stored in the drift layer at turning-on the diode. This, however, results in so-called snappy reverse recovery (hard recovery) to sometimes cause both voltage and current to oscillate.
For example, as is presented in M. Nemoto, et al., Proc. ISPS'98, pp. 305–308 (1998), disappearance of excess carriers in an n−-drift layer before the end of a reverse recovery process causes an abrupt increase in dir/dt. This further causes an accompanied increase in an anode to cathode voltage Vak of a diode to generate a surged voltage. The surged voltage further causes concentration of an electric field to bring about breakdown of the diode. The surged voltage further triggers the voltage itself to oscillate with an oscillation waveform. The oscillation becomes a source of noise radiation from an electric power converting equipment such as an inverter. Therefore, the diode must be provided so that no excess carriers are made to disappear when the diode is in the course of reaching a steady state of current blocking at the reverse recovery.
Moreover, there is also another way of reducing reverse recovery loss by thinning the n−-drift layer within a range, without degrading the breakdown voltage of the element to reduce reverse recovery charges. This, however, reduces carriers stored on the cathode side at the reverse recovery to make the excess carriers liable to disappear during reverse recovery, which easily causes resulting oscillation. Therefore, with current measures, it is becoming difficult to reduce the reverse recovery loss while maintaining the soft recovery characteristics.
One of typical measures for achieving the above trade-off is to combine the previously explained low minority carrier injection structure and the thinned drift layer. By reducing efficiency of minority carrier injection, which increases excess carriers on the cathode side to make the diode perform soft recovery, and by reducing the thickness of the drift layer, the soft recovery can be achieved with high-speed reverse recovery. Moreover, there is also a measure in which irradiation with a beam of light ion particles such as protons or helium ions is carried out for locally controlling lifetime of carriers to make the diode perform improved soft recovery. In these measures, however, the reduced thickness of the drift layer not only lowers breakdown voltage but also imposes limitation in making the diode perform soft recovery. This is because the spread of the space charge region in the drift layer at reverse recovery is mainly dependent on donor distribution in the drift region. Thus, an applied voltage raised within a range below the breakdown voltage of the element eventually increases carriers swept-out into the space charge region by drift even though injection of the minority carriers is lowered. This results in hard recovery.
Another example of the measure for achieving the above trade-off is to provide such a donor distribution that restricts extension of a depletion layer. For example, in a diode shown in FIGS. 3A and 3B (a related device B) that is disclosed in JP-A-8-148699, an n-drift layer 81 is divided into two regions of an n-buffer layer 81a and a constant impurity concentration region 81b. The n-buffer layer 81a on an n-cathode layer 83 side is provided to have low resitivity (high concentration) and the constant impurity concentration region 81b on a p-anode layer 82 side is provided to have high resitivity (low concentration). This restricts extension of a depletion layer at a voltage equal to or above a certain level.
In a diode shown in FIGS. 4A and 4B (a related device C) that is disclosed in JP-A-8-316500, a structure is provided in which the resitivity decreases gradually toward an n-cathode layer so as to make the diode also perform soft recovery. However, in sweeping out carriers at reverse recovery, with the resitivity being higher on a p-anode layer 92 side, the number of the carriers swept out by drift is sometimes rather increased depending on an operation mode of an application such as a high voltage with a low current. This results in hard recovery.
In a diode shown in FIGS. 5A and 5B (a related device D), which is proposed by the present inventor in unpublished and undisclosed application JP-A-2001-48631, which corresponds to U.S. patent application Ser. No. 10/083,673, the disclosure of which is incorporated herein by reference, an n-buffer layer 61a is provided at about mid-point of an n-drift layer 61. The n-buffer layer 61a has a resitivity lower than that of the n-drift layer 61, and has an impurity concentration and a thickness that make the n-buffer layer 61a itself depleted at reverse recovery. This provides a structure by which extension of a depletion layer is controlled to considerably improve the diode both in soft recovery and in a high-speed operation. In such a structure, however, a phenomenon was observed in which the presence of the n-buffer layer 61a increases a rate-of-rise of voltage dV/dt (a phenomenon of increasing dV/dt near a peak of a reverse recovery voltage). This occurs when a space charge region just reaches the n-buffer layer 61a at reverse recovery. From the view point of noise reduction, this has no merit. Thus, the increase in dV/dt must be suppressed.
FIG. 6 is a diagram showing results of simulations of waveforms about anode to cathode voltages Vak and anode currents Ia at revere recovery in the related semiconductor devices A, B, and D shown in FIGS. 1A and 1B, FIGS. 3A and 3B, and FIGS. 5A and 5B, respectively. FIG. 7, FIG. 8, and FIG. 9 are diagrams each showing results of simulations of variations in time about distributions of concentrations of internal carriers (electrons and holes) and electric field strength at a reverse recovery operation in each of the related device A, B, and D together with an impurity concentration distribution therein. Each distribution is taken to a distance from the surface of the p-anode layer in the direction to the n-cathode layer.
In the related device D of FIGS. 5A and 5B, the n-drift layer 61 is formed as follows. On the side of an n-cathode layer 63, a constant impurity concentration region 61c is formed by epitaxial growth with phosphorus taken as an impurity so that the resistivity becomes 65 Ωcm/52 μm. Next to this, the n-buffer layer 61a having a width of about 5 μm is formed with a dose of phosphorus taken as 2×1011 cm−2. Thereafter, about the side of a p-anode layer 62, a constant impurity concentration region 61b is formed by epitaxial growth so that the resistivity becomes 90 Ωcm/60 μm. The integrated impurity concentration of the n-drift layer 61 is about 1.0×1012 cm−2. The distribution of the impurity concentration in the n-buffer layer 61a is given so as to abruptly rise up to a peak concentration like a pulse. With an averaged concentration over the whole region of the n-drift layer 61 taken as Ndm and the peak concentration of the n-buffer layer taken as Np, a ratio of Np/Ndm is given as 20.
As is described in JP-A-2001-48631 (which corresponds to the co-pending application mentioned above) and as is apparent from FIG. 6, the related semiconductor device D of FIGS. 5A and 5B exhibits soft recovery in which oscillation at reverse recovery is inhibited. However, as shown in FIG. 6, the waveform of the reverse recovery voltage Vak for the related device D (shown in dashed line) exhibits an abrupt increase (almost vertical) in the rate-of-change of voltage dV/dt from the time about 0.473 μs. The increase in dV/dt is one of the causes of electromagnetic noise, which needs to be inhibited. As is observed in FIG. 9, a diagram showing results of simulations of variations in time about concentrations of internal carriers (electrons and holes) and electric field strength in the related device D, the space charge region reaches the n-buffer layer 61a at a time between 0.47 μs and 0.475 μs. It is apparent from FIG. 6 that dV/dt is increased during that time. This is a so-called pinning effect of the space charge region (an effect of stopping extension of a depletion region at a buffer layer). By the pinning effect, the spread of the space charge region is stopped at the buffer layer, so that no sweeping out of the carriers by drift occurs any more toward the n-cathode 63 side, causing the current to take hard recovery. However, the presence of the n-buffer layer 61a abruptly increases electric field strength on the side of the p-anode layer 62 to thereby increase dV/dt as shown in FIG. 6.
In the related device A shown in FIGS. 1A and 1B, an n-drift layer 71 (an i layer) is provided by epitaxial growth with the resistivity having 50 Ωcm/117 μm by taking phosphorus as an impurity. The integrated concentration of the donor in the n-drift layer 71 is about 1.1×1012 cm−2. Although not so remarkable as in the related device B shown in FIGS. 3A and 3B, the related device A (shown in dash-dot-dot line) also begins to oscillate at a time of 0.504 μs as shown in FIG. 6. As is observed in FIG. 7, a diagram showing results of simulations of variations in time about concentrations of internal carriers (electrons and holes) and electric field strength in the related device A, the carriers disappear from the time 0.50 μs to the time of 0.52 μs, at which oscillation is started.
In the related device B shown in FIGS. 3A and 3B, an n-drift layer 81 is provided by epitaxial growth with the resistivity made as being 63 Ωcm/70 μm on the side of a p-anode layer 82 and 40 Ωcm/47 μm on the side of an n-cathode layer 83 by taking phosphorus as an impurity. The integrated concentration of the donor in the whole region of the n-drift layer 81 is about 1.1×1012 cm−2. It is observed from FIG. 6 that oscillation of the related device B (shown in dotted line) is started after a peak of the reverse recovery current. As is observed in FIG. 8, a diagram showing results of simulations of variations in time about concentrations of internal carriers (electrons and holes) and electric field strength in the related device B, the carriers disappear when the time goes from 0.49 μs to 0.50 μs, during which oscillation is started as is shown in FIG. 6.
The oscillation at reverse recovery is caused by an abrupt increase in current decreasing rate dir/dt at reverse recovery (i.e. hard recovery). The related device A and related device B perform hard recovery. Thus, there is a need for a semiconductor device and a manufacturing method thereof that inhibits voltage and current oscillations during reverse recovery to achieve enhancement both in high speed and low-loss characteristics and in soft recovery characteristics. The present invention addresses this need